{"created":"2022-01-28T01:00:28.361602+00:00","id":2005062,"links":{},"metadata":{"_buckets":{"deposit":"bc059424-b756-4aaf-84ab-4a8ddb32606a"},"_deposit":{"id":"2005062","owners":[1],"pid":{"revision_id":0,"type":"depid","value":"2005062"},"status":"published"},"_oai":{"id":"oai:u-ryukyu.repo.nii.ac.jp:02005062","sets":["1642838403123","1642838403551:1642838406845"]},"author_link":[],"item_1617186331708":{"attribute_name":"Title","attribute_value_mlt":[{"subitem_1551255647225":"相対遅延モデルに基づく非同期式パイプラインシステムの論理設計と試作および評価","subitem_1551255648112":"ja"},{"subitem_1551255647225":"Design, Manufacture and Evaluation of an Asynchronous Pipeline-System based on Relatively-Delay Model.","subitem_1551255648112":"en"}]},"item_1617186419668":{"attribute_name":"Creator","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"長田, 康敬","creatorNameLang":"ja"}]},{"creatorNames":[{"creatorName":"Nagata, Yasunori","creatorNameLang":"en"}]}]},"item_1617186476635":{"attribute_name":"Access Rights","attribute_value_mlt":[{"subitem_1522299639480":"open access","subitem_1600958577026":"http://purl.org/coar/access_right/c_abf2"}]},"item_1617186609386":{"attribute_name":"Subject","attribute_value_mlt":[{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"非同期システム"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"パイプライン"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"相対遅延"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"3値論理"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"時相論理"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"システム検証"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"ヒステリシスゲート"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"非同期回路"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"計算機システム"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"様相論理"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"非同期式システム"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"電子デバイス・機器"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"システムオンチップ"},{"subitem_1522299896455":"ja","subitem_1522300014469":"Other","subitem_1523261968819":"多値論理"}]},"item_1617186626617":{"attribute_name":"Description","attribute_value_mlt":[{"subitem_description":"科研費番号: 17560361","subitem_description_type":"Other"},{"subitem_description":"2005年度～2008年度科学研究費補助金(基盤研究(C)研究成果報告書","subitem_description_type":"Other"},{"subitem_description":"研究概要：コンピュータの超高速化，高機能化にともなって集積回路が超微細化加工されるに従い，従来のクロックによる同期式システムの考えだけでは正しい動作が保障されないため，要求／応答制御信号を用いた非同期システムが注目されている．本研究では，相対遅延モデルを提案し，これに基づく非同期システムやパイプラインシステムを設計し，これらをFPGA上に実装し，評価を行うものである．研究の途中で，D-素子や2 線論理実装ライブラリ，また，非同期システムの検証手法，時相論理の新しい体系などを提案している．","subitem_description_type":"Other"},{"subitem_description":"研究報告書","subitem_description_type":"Other"}]},"item_1617186643794":{"attribute_name":"Publisher","attribute_value_mlt":[{"subitem_1522300295150":"ja","subitem_1522300316516":"長田康敬"}]},"item_1617186702042":{"attribute_name":"Language","attribute_value_mlt":[{"subitem_1551255818386":"jpn"}]},"item_1617186783814":{"attribute_name":"Identifier","attribute_value_mlt":[{"subitem_identifier_type":"HDL","subitem_identifier_uri":"http://hdl.handle.net/20.500.12000/13508"}]},"item_1617187056579":{"attribute_name":"Bibliographic Information","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2009-06-01","bibliographicIssueDateType":"Issued"}}]},"item_1617258105262":{"attribute_name":"Resource Type","attribute_value_mlt":[{"resourcetype":"research report","resourceuri":"http://purl.org/coar/resource_type/c_18ws"}]},"item_1617265215918":{"attribute_name":"Version Type","attribute_value_mlt":[{"subitem_1522305645492":"AM","subitem_1600292170262":"http://purl.org/coar/version/c_ab4af688f83e57aa"}]},"item_1617605131499":{"attribute_name":"File","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_access","filename":"17560361seika.pdf","mimetype":"application/pdf","url":{"objectType":"fulltext","url":"https://u-ryukyu.repo.nii.ac.jp/record/2005062/files/17560361seika.pdf"},"version_id":"b6746893-8beb-4c3d-9779-78d31550302d"}]},"item_title":"相対遅延モデルに基づく非同期式パイプラインシステムの論理設計と試作および評価","item_type_id":"15","owner":"1","path":["1642838403123","1642838406845"],"pubdate":{"attribute_name":"PubDate","attribute_value":"2009-12-01"},"publish_date":"2009-12-01","publish_status":"0","recid":"2005062","relation_version_is_last":true,"title":["相対遅延モデルに基づく非同期式パイプラインシステムの論理設計と試作および評価"],"weko_creator_id":"1","weko_shared_id":-1},"updated":"2022-10-31T02:28:39.544140+00:00"}