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  1. 紀要論文
  2. 琉球大学工学部紀要
  3. 57号
  1. 部局別インデックス
  2. 工学部

4値VTゲート回路網の合成

http://hdl.handle.net/20.500.12000/14148
http://hdl.handle.net/20.500.12000/14148
2938bef0-a83e-4fed-b968-8c26c8f12ac4
名前 / ファイル ライセンス アクション
No57p059.pdf No57p059.pdf
Item type デフォルトアイテムタイプ(フル)(1)
公開日 2009-12-18
タイトル
タイトル 4値VTゲート回路網の合成
言語 ja
タイトル
タイトル Synthesis of Quaternary VT-gate Networks
言語 en
作成者 比嘉, 広和

× 比嘉, 広和

ja 比嘉, 広和

Search repository
瑞慶覧, 長定

× 瑞慶覧, 長定

ja 瑞慶覧, 長定

Search repository
島袋, 勝彦

× 島袋, 勝彦

ja 島袋, 勝彦

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Higa, Hirokazu

× Higa, Hirokazu

en Higa, Hirokazu

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Zukeran, Chotei

× Zukeran, Chotei

en Zukeran, Chotei

Search repository
Shimabukuro, Katsuhiko

× Shimabukuro, Katsuhiko

en Shimabukuro, Katsuhiko

Search repository
アクセス権
アクセス権 open access
アクセス権URI http://purl.org/coar/access_right/c_abf2
主題
言語 en
主題Scheme Other
主題 VT-gate
主題
言語 en
主題Scheme Other
主題 Implicant
内容記述
内容記述タイプ Other
内容記述 Recently one of the most important problems is the pin limitations in the integrated circuits. Multiplevalued logic has attracted for solution of the problem. because for the same amount of information transfer, the total number of pins required in the multiple-valued integrated circuit chip is much less than that of an binary integrated. In this paper, we discuss synthesizing quaternary VT-gate networks. (VT-gate has variable threshold) An implicant in the function plays important role when synthesizing VT-gate networks. Because we can reduce the number of VT-gates in the networks by utilizing implicant. We apply a candidate for implicant in eval function and show good result was obtained.
内容記述
内容記述タイプ Other
内容記述 紀要論文
出版者
言語 ja
出版者 琉球大学工学部
言語
言語 jpn
資源タイプ
資源タイプ departmental bulletin paper
資源タイプ識別子 http://purl.org/coar/resource_type/c_6501
出版タイプ
出版タイプ VoR
出版タイプResource http://purl.org/coar/version/c_970fb48d4fbd8a85
識別子
識別子 http://hdl.handle.net/20.500.12000/14148
識別子タイプ HDL
収録物識別子
収録物識別子タイプ ISSN
収録物識別子 0389-102X
収録物識別子
収録物識別子タイプ NCID
収録物識別子 AN0025048X
収録物名
言語 ja
収録物名 琉球大学工学部紀要
書誌情報
号 57, p. 59-63, 発行日 1999-03
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