{"created":"2022-01-28T04:25:54.183372+00:00","id":2007561,"links":{},"metadata":{"_buckets":{"deposit":"ab7fb0ff-ba24-453c-8551-0cfcdb43ed1b"},"_deposit":{"id":"2007561","owners":[1],"pid":{"revision_id":0,"type":"depid","value":"2007561"},"status":"published"},"_oai":{"id":"oai:u-ryukyu.repo.nii.ac.jp:02007561","sets":["1642837622505:1642837722116:1642837724616","1642838403551:1642838406845"]},"author_link":[],"item_1617186331708":{"attribute_name":"Title","attribute_value_mlt":[{"subitem_1551255647225":"三安定回路の構成と解析","subitem_1551255648112":"ja"},{"subitem_1551255647225":"Studies on the Tri-Stable State Circuit and its Theoretical Analysis","subitem_1551255648112":"en"}]},"item_1617186419668":{"attribute_name":"Creator","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"鉢嶺, 元助","creatorNameLang":"ja"}]},{"creatorNames":[{"creatorName":"Hachimine, Gensuke","creatorNameLang":"en"}]}]},"item_1617186476635":{"attribute_name":"Access Rights","attribute_value_mlt":[{"subitem_1522299639480":"open access","subitem_1600958577026":"http://purl.org/coar/access_right/c_abf2"}]},"item_1617186626617":{"attribute_name":"Description","attribute_value_mlt":[{"subitem_description":"This paper presents a Tri-stable state circuit using N-P-N transistor and its theoretical analysis. This basic circuit, consisting of two N-P-N transistors and four germanium diodes, is connected between the one transistor's collector and the other transistor's base resistor with the diode pair. An object to be analyzed in this paper are consists of the following four parts; 1) Conditions for a magnitude of the input triggering pulses to be transfer the circuit state. 2) The time for an input triggering pulses which is supplied to the base to be transfer the circuit state completely. 3) Variations of the collector current I_C and the base voltage V_B while the state transition. 4) Dependence of the necessary condition on the circuit parameters. The necessary conditions for a triggering pulses magnitude are derived from an equivalent circuit, and are important to realized a ternary logic circuit for they are implies the circuit parameters only. This circuit is applicable in many other areas repuiring ternary control, such as speed independence logic and fail safe logics.","subitem_description_type":"Other"},{"subitem_description":"紀要論文","subitem_description_type":"Other"}]},"item_1617186643794":{"attribute_name":"Publisher","attribute_value_mlt":[{"subitem_1522300295150":"ja","subitem_1522300316516":"琉球大学理工学部"},{"subitem_1522300295150":"en","subitem_1522300316516":"Science and Engineering Division, University of the Ryukyus"}]},"item_1617186702042":{"attribute_name":"Language","attribute_value_mlt":[{"subitem_1551255818386":"jpn"}]},"item_1617186783814":{"attribute_name":"Identifier","attribute_value_mlt":[{"subitem_identifier_type":"HDL","subitem_identifier_uri":"http://hdl.handle.net/20.500.12000/27714"}]},"item_1617186920753":{"attribute_name":"Source Identifier","attribute_value_mlt":[{"subitem_1522646500366":"ISSN","subitem_1522646572813":"0387-429X"},{"subitem_1522646500366":"NCID","subitem_1522646572813":"AN00250785"}]},"item_1617186941041":{"attribute_name":"Source Title","attribute_value_mlt":[{"subitem_1522650068558":"ja","subitem_1522650091861":"琉球大学理工学部紀要. 工学篇"},{"subitem_1522650068558":"en","subitem_1522650091861":"Bulletin of Science & Engineering Division, University of the Ryukyus. Engineering"}]},"item_1617187056579":{"attribute_name":"Bibliographic Information","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"1973-03-01","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"6","bibliographicPageEnd":"177","bibliographicPageStart":"163"}]},"item_1617258105262":{"attribute_name":"Resource Type","attribute_value_mlt":[{"resourcetype":"departmental bulletin paper","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_1617265215918":{"attribute_name":"Version Type","attribute_value_mlt":[{"subitem_1522305645492":"VoR","subitem_1600292170262":"http://purl.org/coar/version/c_970fb48d4fbd8a85"}]},"item_1617605131499":{"attribute_name":"File","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_access","filename":"No6P163.pdf","mimetype":"application/pdf","url":{"objectType":"fulltext","url":"https://u-ryukyu.repo.nii.ac.jp/record/2007561/files/No6P163.pdf"},"version_id":"6bcb5b63-0378-43d9-81bd-f9982f580450"}]},"item_title":"三安定回路の構成と解析","item_type_id":"15","owner":"1","path":["1642837724616","1642838406845"],"pubdate":{"attribute_name":"PubDate","attribute_value":"2013-10-04"},"publish_date":"2013-10-04","publish_status":"0","recid":"2007561","relation_version_is_last":true,"title":["三安定回路の構成と解析"],"weko_creator_id":"1","weko_shared_id":-1},"updated":"2022-10-31T03:23:15.127783+00:00"}