WEKO3
アイテム
{"_buckets": {"deposit": "ab7fb0ff-ba24-453c-8551-0cfcdb43ed1b"}, "_deposit": {"id": "2007561", "owners": [1], "pid": {"revision_id": 0, "type": "depid", "value": "2007561"}, "status": "published"}, "_oai": {"id": "oai:u-ryukyu.repo.nii.ac.jp:02007561", "sets": ["1642837724616", "1642838406845"]}, "author_link": [], "item_1617186331708": {"attribute_name": "Title", "attribute_value_mlt": [{"subitem_1551255647225": "三安定回路の構成と解析", "subitem_1551255648112": "ja"}, {"subitem_1551255647225": "Studies on the Tri-Stable State Circuit and its Theoretical Analysis", "subitem_1551255648112": "en"}]}, "item_1617186419668": {"attribute_name": "Creator", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "鉢嶺, 元助", "creatorNameLang": "ja"}]}, {"creatorNames": [{"creatorName": "Hachimine, Gensuke", "creatorNameLang": "en"}]}]}, "item_1617186476635": {"attribute_name": "Access Rights", "attribute_value_mlt": [{"subitem_1522299639480": "open access", "subitem_1600958577026": "http://purl.org/coar/access_right/c_abf2"}]}, "item_1617186626617": {"attribute_name": "Description", "attribute_value_mlt": [{"subitem_description": "This paper presents a Tri-stable state circuit using N-P-N transistor and its theoretical analysis. This basic circuit, consisting of two N-P-N transistors and four germanium diodes, is connected between the one transistor\u0027s collector and the other transistor\u0027s base resistor with the diode pair. An object to be analyzed in this paper are consists of the following four parts; 1) Conditions for a magnitude of the input triggering pulses to be transfer the circuit state. 2) The time for an input triggering pulses which is supplied to the base to be transfer the circuit state completely. 3) Variations of the collector current I_C and the base voltage V_B while the state transition. 4) Dependence of the necessary condition on the circuit parameters. The necessary conditions for a triggering pulses magnitude are derived from an equivalent circuit, and are important to realized a ternary logic circuit for they are implies the circuit parameters only. This circuit is applicable in many other areas repuiring ternary control, such as speed independence logic and fail safe logics.", "subitem_description_type": "Other"}, {"subitem_description": "紀要論文", "subitem_description_type": "Other"}]}, "item_1617186643794": {"attribute_name": "Publisher", "attribute_value_mlt": [{"subitem_1522300295150": "ja", "subitem_1522300316516": "琉球大学理工学部"}, {"subitem_1522300295150": "en", "subitem_1522300316516": "Science and Engineering Division, University of the Ryukyus"}]}, "item_1617186702042": {"attribute_name": "Language", "attribute_value_mlt": [{"subitem_1551255818386": "jpn"}]}, "item_1617186783814": {"attribute_name": "Identifier", "attribute_value_mlt": [{"subitem_identifier_type": "HDL", "subitem_identifier_uri": "http://hdl.handle.net/20.500.12000/27714"}]}, "item_1617186920753": {"attribute_name": "Source Identifier", "attribute_value_mlt": [{"subitem_1522646500366": "ISSN", "subitem_1522646572813": "0387-429X"}, {"subitem_1522646500366": "NCID", "subitem_1522646572813": "AN00250785"}]}, "item_1617186941041": {"attribute_name": "Source Title", "attribute_value_mlt": [{"subitem_1522650068558": "ja", "subitem_1522650091861": "琉球大学理工学部紀要. 工学篇"}, {"subitem_1522650068558": "en", "subitem_1522650091861": "Bulletin of Science \u0026 Engineering Division, University of the Ryukyus. Engineering"}]}, "item_1617187056579": {"attribute_name": "Bibliographic Information", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "1973-03-01", "bibliographicIssueDateType": "Issued"}, "bibliographicIssueNumber": "6", "bibliographicPageEnd": "177", "bibliographicPageStart": "163"}]}, "item_1617258105262": {"attribute_name": "Resource Type", "attribute_value_mlt": [{"resourcetype": "departmental bulletin paper", "resourceuri": "http://purl.org/coar/resource_type/c_6501"}]}, "item_1617265215918": {"attribute_name": "Version Type", "attribute_value_mlt": [{"subitem_1522305645492": "VoR", "subitem_1600292170262": "http://purl.org/coar/version/c_970fb48d4fbd8a85"}]}, "item_1617605131499": {"attribute_name": "File", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_access", "download_preview_message": "", "file_order": 0, "filename": "No6P163.pdf", "future_date_message": "", "is_thumbnail": false, "mimetype": "", "size": 0, "url": {"objectType": "fulltext", "url": "https://u-ryukyu.repo.nii.ac.jp/record/2007561/files/No6P163.pdf"}, "version_id": "6bcb5b63-0378-43d9-81bd-f9982f580450"}]}, "item_title": "三安定回路の構成と解析", "item_type_id": "15", "owner": "1", "path": ["1642837724616", "1642838406845"], "permalink_uri": "http://hdl.handle.net/20.500.12000/27714", "pubdate": {"attribute_name": "PubDate", "attribute_value": "2013-10-04"}, "publish_date": "2013-10-04", "publish_status": "0", "recid": "2007561", "relation": {}, "relation_version_is_last": true, "title": ["三安定回路の構成と解析"], "weko_shared_id": -1}
三安定回路の構成と解析
http://hdl.handle.net/20.500.12000/27714
http://hdl.handle.net/20.500.12000/277142097eadd-6f38-42a8-b86f-fbf571925370
名前 / ファイル | ライセンス | アクション |
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No6P163.pdf
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Item type | デフォルトアイテムタイプ(フル)(1) | |||||||||
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公開日 | 2013-10-04 | |||||||||
タイトル | ||||||||||
タイトル | 三安定回路の構成と解析 | |||||||||
言語 | ja | |||||||||
タイトル | ||||||||||
タイトル | Studies on the Tri-Stable State Circuit and its Theoretical Analysis | |||||||||
言語 | en | |||||||||
作成者 |
鉢嶺, 元助
× 鉢嶺, 元助
× Hachimine, Gensuke
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アクセス権 | ||||||||||
アクセス権 | open access | |||||||||
アクセス権URI | http://purl.org/coar/access_right/c_abf2 | |||||||||
内容記述 | ||||||||||
内容記述タイプ | Other | |||||||||
内容記述 | This paper presents a Tri-stable state circuit using N-P-N transistor and its theoretical analysis. This basic circuit, consisting of two N-P-N transistors and four germanium diodes, is connected between the one transistor's collector and the other transistor's base resistor with the diode pair. An object to be analyzed in this paper are consists of the following four parts; 1) Conditions for a magnitude of the input triggering pulses to be transfer the circuit state. 2) The time for an input triggering pulses which is supplied to the base to be transfer the circuit state completely. 3) Variations of the collector current I_C and the base voltage V_B while the state transition. 4) Dependence of the necessary condition on the circuit parameters. The necessary conditions for a triggering pulses magnitude are derived from an equivalent circuit, and are important to realized a ternary logic circuit for they are implies the circuit parameters only. This circuit is applicable in many other areas repuiring ternary control, such as speed independence logic and fail safe logics. | |||||||||
内容記述 | ||||||||||
内容記述タイプ | Other | |||||||||
内容記述 | 紀要論文 | |||||||||
出版者 | ||||||||||
言語 | ja | |||||||||
出版者 | 琉球大学理工学部 | |||||||||
出版者 | ||||||||||
言語 | en | |||||||||
出版者 | Science and Engineering Division, University of the Ryukyus | |||||||||
言語 | ||||||||||
言語 | jpn | |||||||||
資源タイプ | ||||||||||
資源タイプ | departmental bulletin paper | |||||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||||||
出版タイプ | ||||||||||
出版タイプ | VoR | |||||||||
出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||||||
識別子 | ||||||||||
識別子 | http://hdl.handle.net/20.500.12000/27714 | |||||||||
識別子タイプ | HDL | |||||||||
収録物識別子 | ||||||||||
収録物識別子タイプ | ISSN | |||||||||
収録物識別子 | 0387-429X | |||||||||
収録物識別子 | ||||||||||
収録物識別子タイプ | NCID | |||||||||
収録物識別子 | AN00250785 | |||||||||
収録物名 | ||||||||||
言語 | ja | |||||||||
収録物名 | 琉球大学理工学部紀要. 工学篇 | |||||||||
収録物名 | ||||||||||
言語 | en | |||||||||
収録物名 | Bulletin of Science & Engineering Division, University of the Ryukyus. Engineering | |||||||||
書誌情報 |
号 6, p. 163-177, 発行日 1973-03-01 |